1. Field of the Invention
The present invention relates to an analog-to-digital (AD) converter and a voltage detecting device. More particularly, the present invention relates to a parallel AD converter which converts an analog signal to a digital signal using a micro electro mechanical systems (MEMS) technology, and a voltage detecting device thereof.
2. Description of the Related Art
Many natural signals change in an analog (continuous) manner on a time basis. To understand the phenomena of nature, it is required to measure the magnitude of the analog signals on the time basis. The measured values are processed and analyzed using computers. To process and analyze the analog signal using the computer, a device is required to convert the analog signal to a digital value processable by the computer. This device is an analog-to-digital (AD) converter.
The AD converter may be fabricated using a micro electro mechanical systems (MEMS) technology. The MEMS is also referred to as a micro system, a micro machine, a micro mechatronics, and so forth, which indicates a micro system or a micro machine. Namely, a device can be manufactured using the MEMS technology. The AD converter can be miniaturized using the MEMS technology.
Types of the AD converter include a parallel comparator type, a single-slop type, a dual-slope type, a successive approximation type, and so on. The parallel comparator AD converter uses an OP amplifier as the comparator, and outputs a digital value of the binary code by encoding the output signal of the comparator. When an input voltage is higher than a reference voltage, the comparator outputs a voltage corresponding to the logical value 1.
The parallel comparator AD converter includes a plurality of resistances for setting the reference voltages, a plurality of comparators for comparing the voltages with the reference voltage, and an encoder for outputting a digital signal.
However, when the AD converter includes the multiple resistances and the multiple comparators, the resistances and the comparators consume too much power. Also, to implement a high resolution and a high speed, more resistances and comparators are required, which causes the greater power consumption. Specifically, to implement an n-bit AD converter, 2n-ary resistances and (2n−1)-ary comparators are required. As the AD converter of the higher bits is implemented, the power consumption exponentially increases.
It is preferred that the AD converter consumes less power. Therefore, what is needed is an AD converter for achieving the high resolution and the high speed with the lower power consumption.